作者tinray (台南花園彭于晏)
標題[徵才] NV SoC Verification Engineer 台灣
時間2025-06-04 19:27:04
各位先進晚上好，又是我！
我們部門目前有一個新職缺：SoC Verification Engineer。
我們正在尋找對電路驗證充滿熱情、積極主動、並具備良好團隊合作能力的你！
如果你對這個職缺有興趣，歡迎私訊我了解更多資訊～
誠摯期待你的加入！
職缺說明與連結:
What you’ll be doing:
Verify our custom analog macros.
Collaborate with Design, Integration and TE teams to determine verification
scope, develop strategies, implement test planning, and verify designs at IP
level, cluster level, and full chip level
Collaborate with CAD team to optimize & smooth our simulation flow
Generating test patterns and perform chip bringup
What we need to see:
Master degree of Electrical Engineering/Computer Engineering/Computer Science
2+ years of DFT or design experiences
Strong debugging and analytical skills with RTL/Gate-level design
tracing(Verdi) and verification simulation tool(VCS).
Familiarity with SOC basic architecture(clock,reset,power rail,IO pad,package)
Understanding of Design for Testing including Scan/ATPG/BIST/JTAG is a plus
Skills of Python/Perl/Tck/C/C++ is a plus
Ways to stand out from the crowd:
Fluent English communication is required.
https://nvidia.wd5.myworkdayjobs.com/en-US/NVIDIAExternalCareerSite/details/SoC-Verification-Engineer_JR1997534?q=JR1997534
=====================
薪資依照職等實際核薪為主，參考:年薪200-500W
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※ 發信站: 批踢踢實業坊(ptt-web.org.tw), 來自: 59.124.78.18 (臺灣)
※ 文章網址: https://ptt-web.org.tw/Tech_Job/M.1749036428.A.16C
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